Read first: Read the mechanism and worked trace first
An illustrative requester can retain four Tags and 256 bytes of unfinished read data. It issues two 128-byte reads. Assume those requests are supported and no data has yet returned; this is a local reservation policy, not a universal PCIe queue limit.
Reserve requester completion storage independently of link flow control — decision record
Apply the stated local assumptions; record actual platform values before using this as an implementation checklist.
Decision / observation | Required evidence | Consequence |
|---|---|---|
After two requests | Two Tags used; all 256 return bytes reserved | Two free Tags do not imply capacity for another read |
Third 64-byte read considered | No unreserved return storage | Delay admission under this local policy |
One read fully completes | Release its Tag and 128-byte reservation | Re-evaluate admission with both resources |
Its local completion-data reservation can be exhausted. Tags, link credits and destination storage are separate admission resources.
The conventional hierarchy contains a root complex, switches and endpoints. Memory requests use address routing, configuration requests use hierarchy/function routing, and completions use requester identity. Do not use bus/device/function routing as the explanation for every TLP. Record both the route and transaction context when reconstructing a failure.
ATS (Address Translation Services) and PASID can participate in a platform's shared-address-space design when supported and enabled; neither alone creates shared virtual addressing. Keep these optional translation mechanisms separate from the basic DMA mapping used in the trace.
Configure each function's MPS within its capability and ensure requesters never emit a payload larger than their configured/path-legal limit; values need not be numerically identical at every function.
Relaxed ordering and ID-based ordering affect multi-function devices.
AER (Advanced Error Reporting) is the first stop for error debug.