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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
    • Protocols Whiteboard Framework
    • Scenario: AXI Ordering Trap
    • Scenario: DDR Bandwidth Collapse
    • Scenario: PCIe Link Degrade
    • Protocols Interview Q&A Bank
  • Interface Protocols Cheatsheet
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←Bus Protocols
  1. Topics
  2. Bus Protocols
  3. Protocols Interview Prep

Interface ProtocolsAll levels

Protocols Interview Prep

Whiteboard frameworks and protocol debug scenarios.

  • 5topics
  • 5lessons

Topics in this section

  1. 1Protocols Whiteboard Framework1 lesson
  2. 2Scenario: AXI Ordering Trap1 lesson
  3. 3Scenario: DDR Bandwidth Collapse1 lesson
  4. 4Scenario: PCIe Link Degrade1 lesson
  5. 5Protocols Interview Q&A Bank1 lesson

Whiteboard answer shape

  1. Name the protocol layer.

  2. Name the transaction identity.

  3. State the ordering or flow-control rule.

  4. Ask for waveform + transaction log + spec clause.

  5. Propose the smallest experiment.

  6. State the regression suite.

Scenarios

  1. Scenario: AXI Ordering Trap

  2. Scenario: DDR Bandwidth Collapse

  3. Scenario: PCIe Link Degrade

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See also

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary