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Tools

Generators, an editor and career tools for VLSI work.

Generators

Draft starter verification files.

UVM testbench generator
Agent, driver, monitor, scoreboard and coverage skeletons.
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Functional coverage designer
Covergroups, crosses and a coverage plan.
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Code

Write, run and share projects.

SV editor
Run SystemVerilog with waveforms and synthesis.
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Code repo
Browse and share code snippets.
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Career

Resume for VLSI applications.

Resume builder
Build a resume and export it.
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