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Explore VLSI topics

Recommended firstStart Here: RTL and VerificationLearn the chip flow, then simulate, test and automate a small design.BeginnerStart course

Design & RTL

Write synthesizable hardware

BeginnerStart Here: RTL and VerificationStart hereLearn the chip flow, then simulate, test and automate a small design.
BeginnerRTL DesignDesign working RTL from gates to FSMs, timing, CDC and bus interfaces.
IntermediateSystemVerilogWrite expressive RTL and testbenches with types, interfaces and SVA.
IntermediateLogic SynthesisTurn RTL into gates: set constraints and read QoR reports.

Verification

Prove it works before tape-out

IntermediateUVM VerificationBuild reusable testbenches with agents, sequences and scoreboards.
AdvancedFormal VerificationProve properties for every input: assumptions, induction, covers.
IntermediateFirst Principles of Verification StrategyHow to know a chip works and when you have done enough.
IntermediateThe Art of Hardware DebugA method to find any hardware bug, from failing test to hung chip.

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Implementation & signoff

From RTL to timing-clean silicon

IntermediateStatic Timing AnalysisConstrain clocks, analyse setup/hold and close timing across corners.
IntermediatePhysical DesignTake RTL to GDS: floorplan, place, route and sign off the chip.
AdvancedCDC & RDCCatch metastability bugs: synchronise crossings and sign them off.

Architecture & systems

CPUs, GPUs, memory and SoCs

IntermediateComputer ArchitectureUnderstand pipelines, caches and memory systems that set performance.
IntermediateSoC DesignIntegrate a whole chip: maps, fabric, clocks, power and boot.
AdvancedCache CoherencyInvariants, transactions, races and real protocols, with a capstone lab.

Interfaces & protocols

High-speed I/O and buses

IntermediateFirst Principles of Hardware ProtocolsThe questions every protocol answers, from handshakes to replay.
IntermediateBus ProtocolsMaster on-chip buses: APB, AHB and AXI handshakes and integration.

Specialised topics

AI, analog, bring-up and interview prep

BeginnerAI Skills for VLSI EngineersUse AI well at work: prompting, SQL for data, RAG, agents and MCP.
IntermediateDV Interview PuzzlesDrill interview puzzles: races, fork/join and datatype traps.

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Practice questions