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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
    • I2C Timing & Arbitration
    • SPI Modes & Chip-Select Rules
    • UART Flow Control
    • Peripheral Integration Debug
    • Embedded Peripherals (I2C / SPI / UART): Tricky Q&A
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←Bus Protocols
  1. Topics
  2. Bus Protocols
  3. Embedded Peripherals (I2C / SPI / UART)
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    Interface ProtocolsAll levels

    Embedded Peripherals (I2C / SPI / UART)

    Low-speed serial protocol timing, arbitration, chip-select behavior, FIFOs, DMA hooks, interrupts, and driver-visible contracts.

    • 5topics
    • 17lessons

    Section overview

    Low-speed serial protocol timing, arbitration, chip-select behavior, FIFOs, DMA hooks, interrupts, and driver-visible contracts.

    Topics

    1. I2C Timing & Arbitration

    2. SPI Modes & Chip-Select Rules

    3. UART Flow Control

    4. Peripheral Integration Debug

    Related topics

    • Protocols course hub

    After this section

    Try the section checkpoint, then review the Q&A

    Section context

    I2C/SPI/UART bugs are contract bugs: timing, reset value, IRQ type, and DMA watermark.

    Illustrative review scenario

    Illustrative review: a captured SPI transfer violated the flash device's chip-select hold time even though controller loopback passed. The external timing diagram—not the loopback result—defined the missing contract.

    PreviousNext: I2C Timing & Arbitration

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    Up nextI2C Timing & Arbitration

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    See also

    • How to Use This Course
    • Protocol Metrics Reference
    • Protocols Glossary