High-speed I/O debug crosses digital counters, PHY margin, board SI, and firmware sequencing.
Link up ≠ link clean. Check error counters and margin.
Equalisation must be chosen from measured error/margin behaviour across relevant settings and corners.
Correlate physical and digital evidence; neither one alone identifies the failing component.
Debug synthesis for USB, Ethernet, and MIPI.
Otherwise fewer errors may reflect different work or load rather than a corrected mechanism.