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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
    • I2C Timing & Arbitration
    • SPI Modes & Chip-Select Rules
    • UART Flow Control
    • Peripheral Integration Debug
      • Peripheral Integration Debug: Concepts
      • Peripheral Integration Debug: Integration
      • Peripheral Integration Debug: Debug
      • Peripheral Integration Debug: Interview
    • Embedded Peripherals (I2C / SPI / UART): Tricky Q&A
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←Embedded Peripherals (I2C / SPI / UART)
  1. Topics
  2. Bus Protocols
  3. Embedded Peripherals (I2C / SPI / UART)
  4. Peripheral Integration Debug
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    Interface ProtocolsAll levels

    Peripheral Integration Debug

    Low-speed peripheral bugs are contract bugs: register map, reset, interrupt type, and DMA watermarks must all agree.

    • 4topics
    • 4lessons

    What you'll learn

    Low-speed peripheral bugs are contract bugs: register map, reset, interrupt type, and DMA watermarks must all agree.

    • Register reset values define the state before firmware configures.

    • IRQ type (level vs edge) and clear sequence must match driver.

    • DMA descriptor alignment and burst size affect throughput.

    Connection

    Integration debug patterns that apply to all peripheral types.


    Key diagram

    Acknowledge controller and service source

    Acknowledge controller and service source. Chosen level-source example. Controller acknowledgement alone cannot remove a still-active FIFO or status condition; the exact software order is platform-defined.
    Chosen level-source example. Controller acknowledgement alone cannot remove a still-active FIFO or status condition; the exact software order is platform-defined.
    Check yourself Why can the same IRQ be delivered again after controller acknowledgement?

    The peripheral source can still be asserted if its documented condition was not serviced.


    Study this topic

    1. Concepts — rules and mental models

    2. Integration — system contracts

    3. Debug — trace the first divergence

    4. Interview — explain and defend your answer

    PreviousNext: Peripheral Integration Debug: Concepts

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    Up nextPeripheral Integration Debug: Concepts

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    See also

    • I2C Timing & Arbitration
    • SPI Modes & Chip-Select Rules
    • UART Flow Control