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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
    • VIP & Agent Architecture
    • Scoreboard & Checker Strategy
    • Compliance & Coverage Plan
    • Protocol Waveform Debug
      • Protocol Waveform Debug: Concepts
      • Protocol Waveform Debug: Integration
      • Protocol Waveform Debug: Debug
      • Protocol Waveform Debug: Interview
    • Bus Integration Lab
    • Protocol Verification & Compliance: Tricky Q&A
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←Protocol Waveform Debug
  1. Topics
  2. Bus Protocols
  3. Protocol Verification & Compliance
  4. Protocol Waveform Debug
  5. Protocol Waveform Debug: Interview

Interface ProtocolsAll levels

Protocol Waveform Debug: Interview

Interview for Protocol Waveform Debug.

Interview drills

Walk me through waveform debug for a hung AXI transaction.

Check yourself Walk me through waveform debug for a hung AXI transaction.

Tag the transaction ID. Check each channel in order: was AR/AW accepted? Did data complete (W/R)? Did response return (B/R)? Find the first channel where progress stopped. Scroll back to that timestamp. Check ready/valid, state machine, and credit. Correlate with VIP monitor. Reduce to minimal sequence.

Common trap: Starting from the timeout instead of the first stalled channel.

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See also

  • Protocol Waveform Debug: Concepts
  • Protocol Waveform Debug: Integration