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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
    • I2C Timing & Arbitration
      • I2C Timing & Arbitration: Concepts
      • I2C Timing & Arbitration: Integration
      • I2C Timing & Arbitration: Debug
      • I2C Timing & Arbitration: Interview
    • SPI Modes & Chip-Select Rules
    • UART Flow Control
    • Peripheral Integration Debug
    • Embedded Peripherals (I2C / SPI / UART): Tricky Q&A
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←I2C Timing & Arbitration
  1. Topics
  2. Bus Protocols
  3. Embedded Peripherals (I2C / SPI / UART)
  4. I2C Timing & Arbitration
  5. I2C Timing & Arbitration: Interview
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    Interface ProtocolsAll levels

    I2C Timing & Arbitration: Interview

    Interview for I2C Timing & Arbitration.

    Interview drills

    What first distinguishes an address NACK from an SCL-low timeout?

    Check yourself What first distinguishes an address NACK from an SCL-low timeout?

    A NACK requires the applicable acknowledgement clock with SDA released high. A clock that never rises is a different observation and needs line/timing investigation.

    Common trap: Giving a generic fix without identifying the boundary and unmet obligation in this example.

    I2C NACK — what are common causes?

    Check yourself I2C NACK — what are common causes?

    Check the address and strap state, power/reset/readiness, supported bus mode, pull-ups, rise/fall timing and whether the ninth clock really contains a NACK. A controller timeout while SCL is held low is a different observation from an address NACK. Capture SDA/SCL and the controller status before assigning the fault to software or hardware.

    Common trap: Only checking software address once.

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    See also

    • I2C Timing & Arbitration: Concepts
    • I2C Timing & Arbitration: Integration