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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
    • APB & AHB Basics
    • AXI Channels & Transfers
    • AXI-Lite & AXI-Stream
      • AXI-Lite & AXI-Stream: Concepts
      • AXI-Lite & AXI-Stream: Integration
      • AXI-Lite & AXI-Stream: Debug
      • AXI-Lite & AXI-Stream: Interview
    • AMBA Integration Debug
    • AMBA Family (APB / AHB / AXI): Tricky Q&A
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←AMBA Family (APB / AHB / AXI)
  1. Topics
  2. Bus Protocols
  3. AMBA Family (APB / AHB / AXI)
  4. AXI-Lite & AXI-Stream
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    Interface ProtocolsAll levels

    AXI-Lite & AXI-Stream

    AXI-Lite strips bursts for control. AXI-Stream strips addresses for data pipes.

    • 4topics
    • 4lessons

    What you'll learn

    AXI-Lite strips bursts for control. AXI-Stream strips addresses for data pipes.

    • AXI-Lite: single-beat transfers only, no burst, no ID reorder.

    • AXI-Stream: TVALID/TREADY data flow with TLAST, TKEEP, optional TID/TDEST.

    • Pick Lite for registers, Stream for video/DSP/NPU datapaths.

    Connection

    Specializations of AXI for control vs streaming. Often coexist with full AXI on the same SoC.


    Key diagram

    Keep control and stream accounting separate

    Keep control and stream accounting separate. The disconnected paths are different interfaces: Lite has addressed control responses; Stream counts accepted bytes and packet boundaries.
    The disconnected paths are different interfaces: Lite has addressed control responses; Stream counts accepted bytes and packet boundaries.
    Check yourself Which path tells you a packet ended, rather than a register write completed?

    The Stream path: an accepted output beat carrying TLAST ends the packet.


    Study this topic

    1. Concepts — Compare retained register-write context with accepted packet bytes.

    2. Integration — Preserve byte and sideband contracts through conversion.

    3. Debug — Count accepted packet bytes and the final marker at each boundary.

    4. Interview — Choose Lite from traffic requirements rather than block labels.

    PreviousNext: AXI-Lite & AXI-Stream: Concepts

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    Up nextAXI-Lite & AXI-Stream: Concepts

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    See also

    • APB & AHB Basics
    • AXI Channels & Transfers
    • AMBA Integration Debug