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Explain AXI ordering with IDs and where a bridge can break assumptions.

Check yourself Explain AXI ordering with IDs and where a bridge can break assumptions.

For ordinary AXI4, preserve same-port same-ID read order on R and write-response order on B; R/B are separate streams. Retain source-port/ID/sequence mapping when merging or remapping, and aggregate split work under the original request. Replay repeated IDs and simultaneous ports while comparing legal cross-ID controls.

Common trap: Using one overwritten map entry per ID or requiring all different-ID responses to be strictly ordered.

How do you debug DDR bandwidth collapse when peak bus width looks sufficient?

Check yourself How do you debug DDR bandwidth collapse when peak bus width looks sufficient?

Measure accepted useful bytes at a fixed boundary with a known replay. Diff operating mode, address mapping, command/bank/row behaviour, refresh recovery, turnarounds and per-class queue/service evidence. Change one discriminator at a time and account for overlapping constraints before proposing width or QoS changes.

Common trap: Explaining every throughput gap with refresh, locality or a training pass alone.

What evidence separates PCIe link training failure from firmware enumeration failure?

Check yourself What evidence separates PCIe link training failure from firmware enumeration failure?

LTSSM history, negotiated speed/width and lane diagnostics describe link establishment. Actual configuration requests/completions, resource assignment and firmware/OS logs describe discovery. L0 alone does not clear the transaction path, and a BAR access does not validate a host-directed DMA mapping.

Common trap: Assigning a PHY or firmware owner from only the final link state.

How do VIP, assertions, and scoreboards divide protocol verification responsibility?

Check yourself How do VIP, assertions, and scoreboards divide protocol verification responsibility?

Choose who drives and observes each boundary. Use precisely sampled predicates for obligations such as stalled payload retention; reconstruct accepted requests and compare independent expected outcomes across interfaces. Check positive controls, negative sensitivity, capacity and nonzero work. Their scopes overlap, so requirement-linked evidence matters more than a rigid tool taxonomy.

Common trap: Treating a VIP pass, coverage percentage or one checker as complete system proof.

What is the difference between protocol correctness and product performance?

Check yourself What is the difference between protocol correctness and product performance?

A legal response may miss a workload's latency target; an illegal response may be fast. Identify the protocol obligation separately from service assumptions, performance objectives and software-visible completion. Preserve both correctness checks and workload measurements when changing arbitration, buffering or timeouts.

Common trap: Repairing a timeout by only increasing its threshold or trading away correctness to improve a rate.

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