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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
    • Layering & Transaction Model
    • Handshake & Backpressure
    • Ordering & Outstanding Rules
    • Bandwidth & Latency Budgeting
      • Bandwidth & Latency Budgeting: Concepts
      • Bandwidth & Latency Budgeting: Integration
      • Bandwidth & Latency Budgeting: Debug
      • Bandwidth & Latency Budgeting: Interview
      • Bandwidth & Latency Budgeting: Deep Dive
      • Bandwidth & Latency Budgeting: Worked Examples
    • Protocol Fundamentals: Tricky Q&A
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance21
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←Bandwidth & Latency Budgeting
  1. Topics
  2. Bus Protocols
  3. Protocol Fundamentals
  4. Bandwidth & Latency Budgeting
  5. Bandwidth & Latency Budgeting: Interview
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    Interface ProtocolsAll levels

    Bandwidth & Latency Budgeting: Interview

    Interview for Bandwidth & Latency Budgeting.

    Interview drills

    DDR 64-bit at 3200 MT/s — effective bandwidth for streaming?

    Check yourself DDR 64-bit at 3200 MT/s — effective bandwidth for streaming?

    The transfer-rate ceiling is 64 / 8 × 3.2e9 = 25.6 GB/s per channel before protocol, controller and workload effects. Effective bandwidth cannot be inferred from width and transfer rate alone. State the request pattern, channel mapping, locality, competing and coherency traffic, refresh policy, measurement boundary and accepted useful bytes over elapsed time. Multiple channels increase aggregate capacity only when mapping and concurrency let the workload use them.

    Common trap: width × freq only.

    What is the latency knee and why does it matter?

    Check yourself What is the latency knee and why does it matter?

    It is the workload- and configuration-specific region where additional offered load causes queues and a chosen latency percentile to rise sharply. Find it by sweeping a stated replay and measuring accepted traffic, queue occupancy and latency percentiles. Set the operating target below the measured failure point with headroom justified by bursts and corner variation; do not assume one percentage of peak applies to every system.

    Common trap: Confusing with clock frequency knee.

    How do you prove a bandwidth bottleneck is NOT the bus width?

    Check yourself How do you prove a bandwidth bottleneck is NOT the bus width?

    A stall percentage alone cannot prove this. First compare required bandwidth with the width-and-clock ceiling. Count accepted useful bytes, then correlate gaps with request occupancy, target supply and consumer readiness. If a controlled experiment shows a downstream bytes/s limit unchanged by widening, that limit bounds the gain. Multiple limits can coexist: a path may need both greater admission capacity and a wider data channel to meet its target.

    Common trap: Proposing wider bus without stall data.

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    See also

    • Bandwidth & Latency Budgeting: Concepts
    • Bandwidth & Latency Budgeting: Integration
    • Bandwidth & Latency Budgeting: Worked Examples