Compare the required map with symptoms 1 and 4 in the brief. Record which region each access selects before proposing a cause.
What to notice. DMA and SBR occupy separate slots; SRAM0 and SRAM1 have distinct bases; the map is the oracle for a decoder probe.
Exactly one slot is selected at each probe address; probes at the start of slot 1 select only slot 1.
Build ten region rows with inclusive ends. Derive an independent selector test and choose probes that tell the observation apart from legal behaviour. Propose a fault that explains symptom 1, inject it, then document the correction and the observation that proves it.
The address map table in The NanoSoC Tour: region, base, size, access and secure columns.
The ten mapped regions: boot ROM, SRAM0, SRAM1 and the DMA, SBR, UART, SPI, GPIO, INTC and RSTPWR register slots.
Symptoms 1 and 4 in the symptom table.
Deliverable. A ten-row map table (name, base, inclusive end, size) and a probe list with the first and last byte of every region and one address in each unmapped range.
Pass criterion. Every base is aligned to its size, no two ranges intersect, every probe's expected selection matches an independent decode, and the same check rejects a copy of your table that you have damaged on purpose.
The ten-row table and the probe list, with the region each probe must select.
For symptom 1, the access you issued, the region you expected to respond and the region that did.
The damaged table your check rejects, and the one-line reason it is rejected.
Keep your diagnosis in your own report. After the stage checks, compare it with Solutions and run the provided injection checks.