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Course contents

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path
  • SoC Glossary10
  • SoC Metrics Reference
  • SoC Cheatsheet
  • What SoC Integration Is12
  • Architecture and Budgets21
    • Partitioning and Hierarchy
    • Area Budgets
    • Timing Budgets Across Hierarchy
    • Power Budgets
    • Bandwidth Budgets
    • Budget Governance
    • Multi-Die and Chiplet View
  • Memory Maps and Address Decode26
  • Interconnect and Bus Fabrics26
  • Clock and Reset Architecture24
  • Power Architecture21
  • Interrupts, DMA and Peripherals15
  • Memories, Boot and Security21
  • IP Integration and Handoff21
  • Top-Level Verification and Bring-up21
  • Package, Pads and I/O18
  • Chip Signoff and Tapeout18
  • SoC Interview Prep16
  • Capstone: Integrate NanoSoC19
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←SoC Design
  1. Topics
  2. SoC Design
  3. Architecture and Budgets

Part 2 of 14Part 2 of 14/Architecture and BudgetsAll levels

Architecture and Budgets

The integrator's view of SoC architecture: how to partition the chip, set area, timing, power and bandwidth budgets, and govern them to tapeout.

  • 7topics
  • 21lessons

Every SoC is a bet placed early and paid for late: the partition you draw, the area you grant each block, the nanoseconds you allow each path, the milliwatts you promise the package, and the megabytes per second you guarantee each master. On NanoSoC those bets fit on a few tables — a 0.655 mm2 core in a 0.940 mm2 budget, 82.74 mW in RUN against an illustrative thermal limit, 361.4 MB/s sustained per fabric link — but the method is the same at any size. This section teaches the integrator's side of architecture: choosing boundaries for clock, power and protocol reasons, rolling numbers up from the NanoSoC specification so every total adds up, and running the budget as a contract with owners and margin until tapeout. For the ledger mechanics behind block budgets see the PPA Budget Ledger; for negotiating them between teams see Budget Negotiation.

Topic

What it covers

After it you can...

Partitioning and Hierarchy

Flat versus hierarchical design, boundary choices, feedthroughs, the NanoSoC partition rationale

Decide what is a partition and defend every boundary signal.

Area Budgets

Area roll-up from the NanoSoC specification, utilisation and margin, how budgets move through the flow

Roll block areas to a die budget and rebalance an overrun.

Timing Budgets Across Hierarchy

Cycle and nanosecond budgets for crossing paths, I/O delay budgeting, margin allocation

Hand a block a timing budget it can close and check one it returns.

Power Budgets

Dynamic and leakage roll-up per domain and state, thermal envelope, budget versus measured

Prove the chip fits its power and thermal envelope in every state.

Bandwidth Budgets

Workload to bandwidth and latency needs, the link table, spotting the bottleneck link

Name the bottleneck link for any NanoSoC workload with arithmetic.

Budget Governance

Contracts, margin burn-down, escalation, the budget-change process

Run the budget table with owners and call a rebalancing review.

Multi-Die and Chiplet View

What changes when the SoC splits across dies: links, partitions, known-good-die, cross-die budgets

Explain which budgets survive a die split and which must be renegotiated.

Suggested order: partitioning first, because boundaries decide what every later budget is attached to; then area, timing, power and bandwidth, which can be read in any order once partitioning is set; then governance, which assumes you have read at least one budget topic; finally the multi-die view, which replays the whole section across two dies. Readers chasing a number can start at its budget topic directly.

Check yourself Why do budgets come before implementation rather than after measurement?

Because blocks are designed in parallel against their budgets. Without an early contract each block optimises locally and the chip fails globally; measurement only confirms the bet the budget placed.

Be ready to roll NanoSoC's area, power or bandwidth up from the block table without notes, then say who owns each row and how much margin is left.

Related topics

  • Up: SoC Design course hub

  • NanoSoC Tour

  • Glossary

  • Arch: PPA Budget Ledger

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See also

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path