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Course contents

  • Start Here5
  • SystemVerilog Language Foundations28
  • Object-Oriented SystemVerilog for Verification30
  • Constraint Randomization — Interview-Critical Deep Dive39
  • SystemVerilog Assertions — Interview-Critical Deep Dive41
  • Functional Coverage in SystemVerilog25
  • Testbench Architecture in SystemVerilog24
  • Advanced Language & Integration26
  • Senior & Interview Preparation23
    • Senior Debug Playbook
    • Reviewing Verification Code
    • Verification Strategy: Spec to Sign-Off
    • SystemVerilog Interview Q&A Bank
      • Q&A: Language Core
      • Q&A: Testbench Plumbing
      • Q&A: Classes and Interfaces
      • Q&A: Constraint and Assertion Fire-Drill
      • Q&A: Scenario and Design Questions
    • Capstone: Verify a Parameterized FIFO
  • Principal-Level Verification34
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←SystemVerilog Interview Q&A Bank
  1. Topics
  2. SystemVerilog
  3. Senior & Interview Preparation
  4. SystemVerilog Interview Q&A Bank
  5. Q&A: Classes and Interfaces
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    Part 8 of 9, lesson 15 of 23Part 8 of 9/Senior & Interview Prep/Lesson 15 of 23Intermediate

    Q&A: Classes and Interfaces

    Revision: copy depth, virtual dispatch, checked casts, interfaces, clocking and virtual interfaces, as short answers with links to the lessons.

    Classes model behavior that changes at runtime; modules and interfaces model structure fixed at elaboration. The virtual interface is the one bridge between the two worlds. Each answer below is the short version with a link to the lesson.

    Behavior in classes, structure in modules

    Q: Class versus module, why are testbenches built from classes

    A module is a static container fixed at elaboration. A class is a dynamic object created with new, with inheritance, polymorphism and randomization. Testbenches need runtime flexibility, so they use classes; DUTs stay modules because hardware is static structure with timing.

    Taught in: Class Declaration & Objects.

    Q: Shallow copy versus deep copy, what does new-from-object copy

    Level

    What happens

    When it bites

    Handle assignment (t2 = t1)

    One object, two names

    Editing through either name changes both

    Shallow copy (new t1)

    Two objects sharing nested ones

    Editing the copy payload corrupts the original

    Deep copy (hand-written copy)

    Fully independent objects

    Monitors must use it before reusing a transaction

    Taught in: Handles vs Objects, Shallow vs Deep Copy.

    Q: What do virtual methods buy a driver

    A virtual method dispatches on the object type, not the handle type. Components hold base handles while tests inject derived objects, and the driver is never edited. Without virtual the base version runs and the override is silently ignored.

    Taught in: Virtual dispatch.

    Checked casts and shared state

    Q: Checked casts, static members and parameterized classes

    • `$cast`: a checked downcast. As a function it returns 0 on failure so code can branch; as a task it raises a run-time error. It also converts an integral value to an enum. See Casting with $cast.

    • `static`: one copy shared by all instances. Good for transaction IDs and counters, but it is global state in disguise, so never use it as a configuration back-channel. See Static Properties & Methods.

    • Parameterized classes: written once, specialized per type, and each specialization is a distinct type. Use a non-parameterized base class for a common handle. See Parameterized Classes.

    The interface as contract

    Q: Why do interfaces exist, and what do modports enforce

    An interface bundles a signal group into one named port, and protocol assets travel with it: clocking blocks, modports, assertions and tasks. Modports are compile-time direction contracts: the compiler rejects a module driving a signal its modport declares as input. Code holding the raw interface bypasses the contract.

    Taught in: Interface Basics, Modports.

    Q: Clocking skews, what do input and output delays mean

    input #1step samples in the Preponed region, the value just before the edge, exactly what a flop captures. output with a small delay drives past the hold window. #0 samples after the edge may have updated, so it can read post-edge values.

    Diagram
    CLOCKING BLOCK TIMING
    
            setup     edge      hold
      ────────────────┬──┬──┬────────────────────► time
                      │  ▲  │
       input #1step ──┘  │  └── output #2ns drives here
       samples here      │      (after hold window)
       (Preponed: value  clk
        before the edge) rises

    Taught in: Clocking Blocks.

    Getting the virtual interface to the driver

    Q: Why do classes need virtual interfaces, and what goes wrong with many agents

    Classes have no elaboration-time existence, so they cannot have ports. A virtual interface is a runtime handle to a real interface instance, the one sanctioned bridge into the module world. With many agents, each needs its own handle bound to its own instance; binding all of them to instance zero shows triple traffic on port zero and silence elsewhere. Assert the handle is non-null before the run starts.

    Taught in: Why Virtual Interfaces Exist, Multi-Instance & Parameterized vifs.

    Driving DUT pins from class code at the raw edge instead of through the clocking block brings races back. A null virtual interface dies at first use, so assert the handle before the run starts.

    Likely follow-up: why #1step and not #0. #1step is the previous-timestep value, guaranteed pre-edge like silicon. #0 can read post-edge updates.

    Check yourself Without virtual, a base handle holds a derived object and calls the overridden method. Which version runs?

    The base version. Dispatch follows the declared handle type, silently ignoring the override with no warning.

    Check yourself Every agent received instance zero of the interface array. What does the scoreboard see?

    Triple traffic on port zero and nothing on the other ports. Each agent needs its own handle bound to its own instance.

    Related topics

    • OOP: classes and handles

    • OOP: inheritance and polymorphism

    • OOP: virtual interfaces

    • Foundations: interfaces

    • Testbench: bridge to UVM

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    See also

    • Q&A: Language Core
    • Q&A: Scenario and Design Questions