GPU Design · All levels
Shader Multiprocessor & Core Pipeline: Tricky Q&A
Senior interview and review questions for Shader Multiprocessor & Core Pipeline.
Section Q&A bank
Use these drills after completing all topics in Shader Multiprocessor & Core Pipeline. Answer with workload context, mechanism proof, artifact, owner, and release decision.
Why can ALU utilization look healthy while IPC remains low?
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[INT][GPU][SM-SHADER-CORE]
Q: Why can ALU utilization look healthy while IPC remains low?
A:
Frequent scoreboard waits and dependency chains can keep units busy in bursts while leaving issue slots idle overall.
FOLLOW-UP TRAP: Assuming utilization counters alone describe front-end health.What makes register-file banking a recurring shader bottleneck?
diagram
[INT][GPU][SM-SHADER-CORE]
Q: What makes register-file banking a recurring shader bottleneck?
A:
Operand access collisions on hot banks cause structural stalls that scale with instruction mix and compiler allocation patterns.
FOLLOW-UP TRAP: Treating RF conflicts as only a physical-design problem.How do you triage issue-vs-execute bottlenecks quickly?
diagram
[INT][GPU][SM-SHADER-CORE]
Q: How do you triage issue-vs-execute bottlenecks quickly?
A:
Compare issue slot utilization and eligible warp depth first, then map dominant stalls to scoreboard, memory, or execution latency classes.
FOLLOW-UP TRAP: Optimizing execution pipelines before checking issue-side starvation.When does compiler scheduling become the main performance owner?
diagram
[INT][GPU][SM-SHADER-CORE]
Q: When does compiler scheduling become the main performance owner?
A:
When hardware counters show dependency stalls and replay pressure despite balanced SM resource provisioning.
FOLLOW-UP TRAP: Escalating to microarchitecture redesign before codegen analysis.Q&A drill guide
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WORKLOAD -> BOTTLENECK -> METRIC -> CHANGE -> REGRESSIONSketch while answering
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SM CORE LOOP
warp schedulers -> issue ports -> ALU/FPU/Tensor pipelines
scoreboard + register file gate progressKey takeaways
Always pair micro-kernel metrics with end-to-end workload impact.
Lock toolchain, driver, and launch metadata before comparing performance results.
Common pitfalls
Optimizing occupancy without checking memory-system saturation.
Comparing profiler captures from different driver or compiler builds.
Declaring wins without reproducible accuracy and performance gates.