GPU Programming Model & SIMT

Section goal

SIMD vs SIMT execution, warp behavior, launch hierarchy, and occupancy-aware kernel thinking for real hardware throughput.

How to study this section

1. Start with each topic hub and sketch the SIMT-to-silicon mechanism.

2. Use reports and debug pages to prove bottlenecks with evidence.

3. Practice worked examples and interview drills for design-review fluency.

4. Close with checklist and silicon impact before signoff claims.

Topics

1. simd-vs-simt-fundamentals/ - SIMD vs SIMT Fundamentals

2. warp-wavefront-execution/ - Warp/Wavefront Execution

3. thread-block-grid-hierarchy/ - Thread Block & Grid Hierarchy

4. kernel-launch-occupancy-basics/ - Kernel Launch & Occupancy Basics

Related topics

• GPU Design course hub

GPU deep dive

SIMT abstractions are productive only when launch geometry and divergence behavior align with hardware.

Concept diagram

PROGRAMMING MODEL STACK

host API -> kernel launch -> grid -> block -> warp -> lane

Metric graph

KERNEL EFFICIENCY TREND

warp execution efficiency  ██████████
memory replay ratio        █████
idle issue slots           ███

Reports and artifacts

• occupancy report

• warp efficiency summary

• kernel launch audit

• replay counter snapshot

Mini case study

A block-size bump improved theoretical occupancy but increased replay and reduced achieved throughput by 22%.

Debug branches

• Map launch geometry to active warps per SM

• Correlate branch masks with divergence hotspots

• Validate occupancy against achieved IPC

Senior review question

Ask: which metric and benchmark pairing proves this topic is truly closed in production context?