GPU Design · All levels

Rasterization & Early-Z: Mechanism

Mechanism for Rasterization & Early-Z.

Mechanism to understand

Mechanism for Rasterization & Early-Z centers on raster throughput, early-Z kill rate, and overdraw reduction. The objective is to connect profiler evidence to root-cause mechanism and release-safe action.

Rasterization maps primitives to fragments while early depth/stencil tests cull occluded work before expensive shader execution. Read this as a GPU contract across software launch geometry, compiler mapping, SM microarchitecture, and memory/interconnect behavior.

  • Identify the first failing workload or scene and metric movement.

  • Classify bottleneck: scheduler, execution pipeline, memory, fabric, or thermal.

  • Identify owner with smallest reversible fix path.

SIMT execution sketch

diagram
SIMT EXECUTION — Rasterization & Early-Z

warp 0 lanes:  0 1 2 3 4 5 6 7 ... 31
active mask :  1 1 1 1 0 0 1 1 ...  1
instruction :  IF branch taken on active lanes

cycle 10: issue warp 0
cycle 11: issue warp 3
cycle 12: warp 0 reconverges

Focus: lane masking and warp progress
Metric tracked: raster throughput, early-Z kill rate, and overdraw reduction

Raster and early depth culling

diagram
RASTER + EARLY-Z FLOW

triangles -> setup -> raster tiles -> early-Z/depth-stencil -> fragment queue
                                      | pass | fail |
                                      | shade| cull |

Higher early-Z kill rate reduces fragment ALU pressure and memory traffic.

Overdraw bottleneck lens

diagram
BANDWIDTH ROOFLINE — Rasterization & Early-Z

performance
   ^
   |                compute ceiling
   |               /
   |              /
   |-------------/------------------ memory ceiling
   +------------------------------------------> operational intensity
      memory-bound             compute-bound

Interpretation: show overdraw-driven memory pressure vs culling gains

Ownership layers

diagram
GPU OWNERSHIP LAYERS — Rasterization & Early-Z

artifact area     owner
----------------  ----------------------------
architecture    raster backend owner
RTL/microarch   graphics architect
software/tools  performance engineer

Rule: each metric needs a named owner before signoff.

GPU deep dive

Frame-time stability depends on balancing fixed-function stages with programmable shader pressure.

Concept diagram

diagram
GRAPHICS PIPELINE

vertex -> tessellation -> raster -> fragment -> ROP/blend

Metric graph

diagram
FRAME-TIME PRESSURE

fragment shading load  ████████
raster backpressure    █████
ROP/blend stalls       ████

Reports and artifacts

  • stage occupancy timeline

  • early-Z efficiency report

  • ROP queue depth

  • overdraw heatmap

Mini case study

Async compute overlapped with heavy fragment scenes and triggered ROP queue buildup, causing p99 frame spikes.

Debug branches

  • Correlate frame spikes with stage-level queues

  • Validate early-Z effectiveness under real content

  • Isolate graphics-compute arbitration conflicts

Senior review question

Ask: which metric and benchmark pairing proves this topic is truly closed in production context?

Key takeaways

  • Always pair micro-kernel metrics with end-to-end workload impact.

  • Lock toolchain, driver, and launch metadata before comparing performance results.

Common pitfalls

  • Optimizing occupancy without checking memory-system saturation.

  • Comparing profiler captures from different driver or compiler builds.

  • Declaring wins without reproducible accuracy and performance gates.

Mechanism deep dive

Rasterization & Early-Z is not just a definition to memorize. In a real GPU program it becomes an interaction between software shape, compiler mapping, warp execution, memory movement, interconnect policy, and physical limits. The first senior move is to name which layer is being exercised before interpreting a counter.

Rasterization maps primitives to fragments while early depth/stencil tests cull occluded work before expensive shader execution. This mechanism matters because GPUs are throughput machines: a small inefficiency repeated across lanes, warps, SMs, frames, or dispatches can dominate product performance even when a unit-level diagram looks balanced.

Use raster throughput, early-Z kill rate, and overdraw reduction as an entry point, not as the conclusion. A metric shift only becomes actionable after it is tied to a workload slice, a profiler capture, an architectural path, and a reproducible artifact such as raster tile occupancy map, depth-test effectiveness report, and overdraw heatmap.

Graphics throughput depends on balancing fixed-function stages with programmable shader pressure. The review posture is therefore evidence-first: explain what the kernel or graphics workload asked for, how the GPU mapped it onto hardware, where useful work stopped, and which owner can change the smallest boundary safely.

Mechanism detail: Rasterization maps primitives to fragments while early depth/stencil tests cull occluded work before expensive shader execution.

Read Rasterization & Early-Z as a loop: the software requests parallel work, the compiler/runtime packs it into a hardware-friendly form, the SM executes through schedulers and operand paths, and the memory/fabric system decides whether data arrives fast enough to keep lanes productive.

The common failure pattern is local optimization with global blindness. A kernel can look compute-heavy but be memory transaction limited; a graphics pass can look shader-limited but actually stall behind ROP or depth behavior; a high-occupancy launch can lose to register pressure and replay.