RISC-V Design · All levels
Privilege Levels, Execution Modes, and Delegation Boundaries: Review Checklist
Review Checklist for Privilege Levels, Execution Modes, and Delegation Boundaries.
Review checklist
Review Checklist for Privilege Levels, Execution Modes, and Delegation Boundaries is anchored on Privilege-transition latency and number of unauthorized accesses blocked by PMP/page-permission checks per billion instructions.. Convert observations into mechanism-backed decisions with explicit ownership.
Workload scope and KPI targets are explicit.
Environment metadata is locked and reproducible.
Mechanism classification is evidence-backed.
Owner and rollback conditions are documented.
Validation matrix covers correctness, perf, and power.
Owners signed: CPU architecture lead, privileged ISA owner, firmware and boot owner, kernel porting owner, security validation owner.