RISC-V Design · All levels
RISC-V Glossary
Shared vocabulary across ISA, microarchitecture, privilege, and system closure.
Terms to use precisely
Precise exception: trap model where younger effects are not committed.
SFENCE.VMA: translation-state synchronization after mapping changes.
PMP: physical-address permission control by privilege mode.
VLEN/VL: vector hardware width and active vector length contract.
CPI decomposition: attribution of performance loss by mechanism class.
Profile policy: declared extension contract and compatibility surface.