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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
    • Sequence Puzzles
    • Implication Puzzles
    • Temporal Corner Puzzles
    • Assertion Debug Puzzles
      • disable iff Reset Glitch Hides a Lost Grant
      • Multiclock Ack Visibility
      • Weak vs Strong at End of Simulation
      • Overlapping Attempts Share One Grant
      • $rose Consumed During Reset
      • Intersect Requirement in Dual Checks
    • SVA Assertion Puzzles: Tricky Q&A
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Assertion Debug Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SVA Assertion Puzzles
  4. Assertion Debug Puzzles
  5. Overlapping Attempts Share One Grant
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    VLSI DV Interview PuzzlesAll levels

    Overlapping Attempts Share One Grant

    Property intent: every req must get its own gnt within 1 to 3 cycles. Timeline (all other samples are 0): C10 req=1, C11 req=1, C12 gnt=1 (a single grant pulse, and no other grants). Determine the verdict, and say whether the green log proves both requests were granted.

    Puzzle

    Difficulty: Medium · Puzzle 4 of 6 · Topic: Assertion Debug Puzzles

    Property intent: every req must get its own gnt within 1 to 3 cycles. Timeline (all other samples are 0): C10 req=1, C11 req=1, C12 gnt=1 (a single grant pulse, and no other grants). Determine the verdict, and say whether the green log proves both requests were granted.

    Code

    design.sv
    property p_bounded_resp;
      @(posedge clk) req |-> ##[1:3] gnt;
    endproperty

    Hint

    Each req starts its own attempt. Write down the window of each attempt and check whether the single gnt falls inside both.

    Step-by-step solution

    Diagram
    1) The req at C10 starts attempt A with window C11..C13; the req at C11 starts attempt B with window C12..C14.
    2) gnt at C12 lies inside both windows, so attempt A and attempt B each find a match.
    3) No failure is reported even though one gnt pulse served two requests.
    4) The property is per attempt and has no notion of one-to-one matching, so a lost grant is invisible.

    Answer

    Answer: PASS (no failure) - the single gnt at C12 satisfies both overlapping attempts, so the green log does not prove two grants were issued.

    How this was checked

    Checked by running the code in Verilator 5; the printed output supports the answer above. No failure is reported although 2 requests were answered by 1 grant pulse: the green log does not prove two grants.

    Why candidates get it wrong

    A bounded-response assertion checks each attempt independently. Back-to-back requests make attempts overlap, and one late or shared grant can satisfy several of them. (With the lone grant at C14 instead, attempt A fails at C13 while B passes, so only the earliest request is flagged.)

    Interviewer follow-up

    What extra check catches the lost grant? Model answer: add a one-to-one check, typically a scoreboard counter: increment on req, decrement on gnt, assert it never goes negative and returns to zero within the maximum latency after the last req. For in-order protocols a queue of request timestamps checked at each gnt does the same job. Keep the bounded-response assertion for latency.

    Say it out loud

    I would draw the two windows: the request at C10 allows a grant at C11 to C13, the request at C11 allows C12 to C14. The single grant at C12 falls in both, so each attempt finds a match and the property passes. The trap is believing the green log proves two grants; the property has no one to one matching, so a lost grant is invisible. I would add a scoreboard or a count check that requests and grants match.

    Related topics

    • Bounded Response Is Safety

    • Evaluation Attempts & Threads

    • Back to Assertion Debug Puzzles

    • SVA Assertion Puzzles section

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    See also

    • disable iff Reset Glitch Hides a Lost Grant
    • Multiclock Ack Visibility
    • Intersect Requirement in Dual Checks