Register Conventions and Calling Discipline: Mechanism

Mechanism to understand

Mechanism for Register Conventions and Calling Discipline is anchored on Function-call overhead (instructions per call), spill/reload rate, and ABI conformance pass rate in integration tests.. Convert observations into mechanism-backed decisions with explicit ownership.

The RISC-V ABI assigns semantic roles to integer registers (argument, temporary, saved, stack pointer, return address, and global/thread pointers), enabling predictable interoperability across compilers, operating systems, and libraries. Calling convention rules define who preserves which registers, how arguments and return values are passed, and how stack frames are aligned and unwound. This contract is critical for mixed-language builds, interrupt boundaries, and debug tooling: even highly optimized code must preserve observable ABI guarantees. Performance tuning often centers on minimizing spills and call boundaries while still respecting callee-saved obligations and reentrancy constraints. In practice, correctness issues usually emerge at boundaries (handwritten assembly, trap handlers, context switches, and FFI shims), so teams treat ABI adherence as a first-class verification target rather than a documentation-only concern.

• Name first failing path and trigger condition.

• Prove path loss with one measurable artifact.

• Assign owner who can deliver smallest reversible fix.

Pipeline mechanism sketch

RISC-V PIPELINE DIAGRAM - Register Conventions and Calling Discipline

PC -> IF -> ID -> EX -> MEM -> WB
      |     |      |      |      |
  i-cache decode  ALU/BR  LSU    regfile write
              \   |
               +-> branch resolve + redirect

Hot paths:
  - branch + load-use dependencies in ID/EX
  - memory latency stretching MEM stage
  - writeback arbitration for integer/vector units

Focus: keep control hazards predictable

Decode intent map

DECODE CONTROL MAP - Register Conventions and Calling Discipline

opcode/funct3/funct7      controls asserted
-----------------------   ---------------------------------------
LUI / AUIPC               rd_write, imm_select(U), alu_add_pc
JAL / JALR                rd_write, pc_redirect, link_write
BRANCH                    cmp_enable, branch_type, pc_redirect
LOAD                      mem_read, rd_write, wb_sel(memory)
STORE                     mem_write, store_size, addr_calc
OP-IMM                    alu_enable, imm_select(I), rd_write
OP                        alu_enable, src2_reg, rd_write
SYSTEM / CSR              csr_readwrite, trap_check, privilege_gate
VECTOR (V extension)      vdecode, lane_mask, vtype_update