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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
    • Constraint Solving Order Puzzles
    • Distribution Puzzles (`dist`, `:=` vs `:/`)
      • Case A vs Case B vs Trap Variant
      • Small Range with := vs Large Range with :/
      • Soft Constraint Priority (a soft puzzle in the dist section)
      • dist After Hard Pruning
      • Boolean dist Cascading into Value dist
      • Zero Weight Means Never Chosen
    • solve...before Bias Puzzles
    • randomize() with Puzzles
    • Randomization & Constraint Puzzles: Tricky Q&A
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Randomization & Constraint Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Randomization & Constraint Puzzles
  4. Distribution Puzzles (`dist`, `:=` vs `:/`)
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    VLSI DV Interview PuzzlesAll levels

    Distribution Puzzles (`dist`, `:=` vs `:/`)

    Translate every dist clause into per-value effective weights, then normalize; mixing := and :/ changes granularity and can dramatically skew outcomes.

    • 6topics
    • 6lessons

    Topics in this section

    1. 1Case A vs Case B vs Trap Variant1 lesson
    2. 2Small Range with := vs Large Range with :/1 lesson
    3. 3Soft Constraint Priority (a soft puzzle in the dist section)1 lesson
    4. 4dist After Hard Pruning1 lesson
    5. 5Boolean dist Cascading into Value dist1 lesson
    6. 6Zero Weight Means Never Chosen1 lesson

    About this puzzle set

    Translate every dist clause into per-value effective weights, then normalize; mixing := and :/ changes granularity and can dramatically skew outcomes.

    Puzzles in this topic

    Diagram
    1. Case A vs Case B vs Trap Variant  [Medium]
    2. Small Range with := vs Large Range with :/  [Easy]
    3. Soft Constraint Priority (a soft puzzle in the dist section)  [Medium]
    4. dist After Hard Pruning  [Medium]
    5. Boolean dist Cascading into Value dist  [Medium]
    6. Zero Weight Means Never Chosen  [Easy]

    Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.

    Constraint solve order and dependency flow

    Diagram
    CONSTRAINT SOLVE ORDER
    
    rand bit [3:0] burst_len;
    rand bit [7:0] addr;
    
    constraints:
      burst_len inside {[1:8]};
      addr % burst_len == 0;
      solve burst_len before addr;
    
    solver picks burst_len first
                then chooses addr satisfying alignment
    
    Explicit solve order reduces ambiguity in interview puzzles.

    Related topics

    • Randomization & Constraint Puzzles section

    • VLSI DV Interview Puzzles hub

    PreviousNext: Case A vs Case B vs Trap Variant

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    See also

    • Constraint Solving Order Puzzles
    • solve...before Bias Puzzles
    • randomize() with Puzzles