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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
    • Handle and Copy Puzzles
    • Virtual Method Puzzles
    • Parameterized Class Puzzles
    • Factory Override Puzzles
      • Type Override vs Instance Override Precedence
      • Chained Type Overrides
      • Replace Flag in Repeated set_type_override
      • Overlapping Instance Overrides: First Match Wins
      • Component Override in build_phase
      • Override Timing Relative to create Calls
    • OOP & Testbench Puzzles: Tricky Q&A
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Factory Override Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. OOP & Testbench Puzzles
  4. Factory Override Puzzles
  5. Override Timing Relative to create Calls
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    VLSI DV Interview PuzzlesAll levels

    Override Timing Relative to create Calls

    An object is created before override registration and another after. Which object types result and why?

    Puzzle

    Difficulty: Easy · Puzzle 6 of 6 · Topic: Factory Override Puzzles

    An object is created before override registration and another after. Which object types result and why?

    Code

    design.sv
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    class base_item extends uvm_object;
      `uvm_object_utils(base_item)
      function new(string name="base_item"); super.new(name); endfunction
    endclass
    class tuned_item extends base_item;
      `uvm_object_utils(tuned_item)
      function new(string name="tuned_item"); super.new(name); endfunction
    endclass
    
    initial begin
      base_item pre, post;
      pre  = base_item::type_id::create("pre");
      base_item::type_id::set_type_override(tuned_item::get_type());
      post = base_item::type_id::create("post");
      $display("pre=%s post=%s", pre.get_type_name(), post.get_type_name());
    end

    Hint

    Factory resolves override at each create call; existing objects are already constructed.

    Step-by-step solution

    Diagram
    1) `pre` is created before override table is updated, so it is `base_item`.
    2) After `set_type_override`, subsequent create requests for base map to `tuned_item`.
    3) `post` becomes `tuned_item`; overrides are not retroactive.

    Answer

    Answer: Output is `pre=base_item post=tuned_item`; factory overrides affect future creates only.

    How this was checked

    Checked by running the code in Verilator 5; the printed output supports the answer above. A hand-written model of the documented UVM 1.2 factory rule (not the UVM library): an override affects only later create calls.

    Why candidates get it wrong

    Teams sometimes expect override calls to mutate already-constructed object types. `pre` stays a `base_item` forever, so the order of override and create is what the test depends on.

    Interviewer follow-up

    How can testbench architecture delay creation to keep overrides deterministic? Model answer: register all overrides in the test's `build_phase` before `super.build_phase` creates the env, build the environment only through `type_id::create` in `build_phase`, and create sequence items lazily at use time (inside the sequence body) rather than in constructors or static initializers.

    Say it out loud

    It prints pre equals base_item and post equals tuned_item. Overrides affect only creates that happen after they are set, and they are not retroactive. The pre object was created before the override, so it stays base_item. The trap is expecting the override to change existing objects, so I would check the ordering of set and create calls.

    Related topics

    • Override Timing, Safety and Debug

    • Override Resolution: Who Wins

    • Back to Factory Override Puzzles

    • OOP & Testbench Puzzles section

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    Next: OOP & Testbench Puzzles: Tricky Q&A

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    Up nextOOP & Testbench Puzzles: Tricky Q&A

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    See also

    • Type Override vs Instance Override Precedence
    • Chained Type Overrides
    • Replace Flag in Repeated set_type_override