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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
    • Covergroup and Coverpoint Puzzles
      • Auto vs explicit bins with illegal transition context
      • Default bin is not scored
      • Bin array math with mixed declarations
      • Transition bin sequence counting
      • illegal_bins vs ignore_bins accounting
      • Same traffic, different denominator
    • Cross Coverage Puzzles
    • Coverage Options Puzzles
    • Coverage Closure and Sampling Timing Puzzles
    • Functional Coverage Puzzles: Tricky Q&A
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Covergroup and Coverpoint Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Functional Coverage Puzzles
  4. Covergroup and Coverpoint Puzzles
  5. Auto vs explicit bins with illegal transition context
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    VLSI DV Interview PuzzlesAll levels

    Auto vs explicit bins with illegal transition context

    Predict bin counts and final coverage for all three coverpoints after this sample sequence. Explain why one sampled value raises an error but does not improve legal coverage. Options: none set (all defaults: at_least = 1, weight = 1, auto_bin_max = 64).

    Puzzle

    Difficulty: Medium · Puzzle 1 of 6 · Topic: Covergroup and Coverpoint Puzzles

    Predict bin counts and final coverage for all three coverpoints after this sample sequence. Explain why one sampled value raises an error but does not improve legal coverage. Options: none set (all defaults: at_least = 1, weight = 1, auto_bin_max = 64).

    Code

    design.sv
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    covergroup cg with function sample(bit [1:0] mode, bit [1:0] state);
      cp_mode_auto: coverpoint mode;
    
      cp_mode_exp: coverpoint mode {
        bins idle_or_cfg = {0,1};
        bins run         = {2};
        illegal_bins bad = {3};
      }
    
      cp_state_tr: coverpoint state {
        bins up   = (0 => 1 => 2);
        bins down = (2 => 1 => 0);
      }
    endgroup
    
    initial begin
      cg c = new();
      c.sample(0,0);
      c.sample(1,1);
      c.sample(2,2);
      c.sample(3,1);
      c.sample(2,0);
    end

    Hint

    Count legal bins only for cp_mode_exp, then derive transition sequence from sampled state values 0,1,2,1,0.

    Step-by-step solution

    Diagram
    1) cp_mode_auto has 4 auto bins (0,1,2,3) and all are hit -> 4/4 = 100%.
    2) cp_mode_exp has 2 legal bins (idle_or_cfg, run); both are hit -> 2/2 = 100%.
    3) mode=3 hits illegal_bins bad and is reported as illegal activity, not legal progress.
    4) cp_state_tr sees sampled states 0,1,2,1,0 so both up and down transitions occur -> 2/2 = 100%.

    Answer

    Answer: cp_mode_auto: 4/4 = 100%. cp_mode_exp: legal coverage 2/2 = 100% with one illegal hit on value 3. cp_state_tr: 2/2 = 100%.

    How this was checked

    Checked by running a model of the rule in a Python model. A model of the LRM counting rule: the illegal hit on mode 3 is logged but adds nothing to the legal 2 of 2.

    Why candidates get it wrong

    Illegal bins are correctness alarms. They do not increase legal numerator or denominator, so they cannot close functional coverage.

    Interviewer follow-up

    If the simulator is configured to stop on illegal_bins, how would that change your closure strategy and test ordering? Model answer: A hit on an illegal bin is a runtime error, so any test that reaches mode = 3 fails or stops and the samples after it are lost. Keep illegal stimulus out of the normal closure regressions and run it in a separate negative test where the error is expected; closure tests must stay error-free. Order does not change the numbers, but a stop-on-error run truncates the coverage collected after the first illegal hit.

    Say it out loud

    I would count legal bins only. The auto coverpoint has four bins, the explicit one has two legal bins, and the transition coverpoint has up and down, and every one of them is hit, so each shows 100 percent. The value 3 lands in the illegal bin, which is logged as an error but adds nothing to the legal numerator or denominator. The trap is thinking a clean 100 percent means the protocol was respected, so I would also check the illegal hit count.

    Related topics

    • Exclusions, Patterns & Filters

    • Transition Bins

    • Back to Covergroup and Coverpoint Puzzles

    • Functional Coverage Puzzles section

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    See also

    • Bin array math with mixed declarations
    • Transition bin sequence counting
    • illegal_bins vs ignore_bins accounting