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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
    • Covergroup and Coverpoint Puzzles
    • Cross Coverage Puzzles
    • Coverage Options Puzzles
    • Coverage Closure and Sampling Timing Puzzles
      • Sampling region off-by-one on state bins
      • Unreachable bin from stimulus constraints
      • Sampling on a derived clock sees the updated value
      • Reset-time samples filtered by iff
      • Unreachable cross tuple from protocol rules
      • at_least threshold causes closure plateau
    • Functional Coverage Puzzles: Tricky Q&A
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Coverage Closure and Sampling Timing Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Functional Coverage Puzzles
  4. Coverage Closure and Sampling Timing Puzzles
  5. Unreachable cross tuple from protocol rules
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    VLSI DV Interview PuzzlesAll levels

    Unreachable cross tuple from protocol rules

    Cross closure is stuck at 75% despite long regressions. Explain mathematically and propose model correction. Options: none set (all defaults: at_least = 1, weight = 1, auto_bin_max = 64).

    Puzzle

    Difficulty: Medium · Puzzle 5 of 6 · Topic: Coverage Closure and Sampling Timing Puzzles

    Cross closure is stuck at 75% despite long regressions. Explain mathematically and propose model correction. Options: none set (all defaults: at_least = 1, weight = 1, auto_bin_max = 64).

    Code

    design.sv
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    covergroup cg with function sample(bit opcode, bit resp);
      cp_opcode: coverpoint opcode {
        bins rd = {0};
        bins wr = {1};
      }
      cp_resp: coverpoint resp {
        bins ok    = {0};
        bins slverr = {1};
      }
      x: cross cp_opcode, cp_resp;
    endgroup
    
    // Protocol guarantee: rd always returns ok, never slverr

    Hint

    Auto cross has 4 tuples, but one is forbidden by protocol semantics.

    Step-by-step solution

    Diagram
    1) Cross denominator is 2*2 = 4 tuples.
    2) Tuple (rd,slverr) is unreachable by protocol.
    3) Maximum realizable hits are 3 tuples -> closure ceiling 3/4 = 75%.
    4) Corrective action is to ignore/illegalize unreachable tuple with rationale tied to spec.
    5) Example: illegal_bins rd_slverr = binsof(cp_opcode.rd) && binsof(cp_resp.slverr); the cross then has 3 scored tuples and reaches 100%.

    Answer

    Answer: Stall at 75% is expected because rd+slverr cannot happen legally. Model must encode protocol reachability.

    How this was checked

    Checked by running a model of the rule in a Python model. A model of the cross rule: the unreachable tuple caps closure at 3 of 4 until it is made illegal.

    Why candidates get it wrong

    Expecting 100% from a 2 x 2 auto cross when the protocol makes (rd, slverr) impossible: the ceiling is 3/4 = 75% until that tuple is excluded. Excluding it with ignore_bins would hide a protocol bug; illegal_bins turns a hit into an error.

    Interviewer follow-up

    Would you model rd+slverr as ignore_bins or illegal_bins, and what trade-off drives that choice? Model answer: illegal_bins, because the protocol guarantees it can never happen: if it does, that is a design or monitor bug and the tool reports an error. ignore_bins would silently hide it, so use ignore_bins only for combinations that are legal but not worth covering.

    Say it out loud

    I would count the reachable tuples. The two by two cross has four bins, but read with slave error cannot happen legally, so the ceiling is three of four, 75 percent, until that tuple is excluded. The model must encode protocol reachability. The trap is using ignore_bins, which would hide a protocol bug, so I would use illegal_bins, which turns a hit into an error.

    Related topics

    • Pruning Crosses: ignore_bins & illegal_bins

    • Holes and Unreachable Bins

    • Back to Coverage Closure and Sampling Timing Puzzles

    • Functional Coverage Puzzles section

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    See also

    • Sampling region off-by-one on state bins
    • Unreachable bin from stimulus constraints
    • Sampling on a derived clock sees the updated value