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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
    • Covergroup and Coverpoint Puzzles
    • Cross Coverage Puzzles
    • Coverage Options Puzzles
    • Coverage Closure and Sampling Timing Puzzles
      • Sampling region off-by-one on state bins
      • Unreachable bin from stimulus constraints
      • Sampling on a derived clock sees the updated value
      • Reset-time samples filtered by iff
      • Unreachable cross tuple from protocol rules
      • at_least threshold causes closure plateau
    • Functional Coverage Puzzles: Tricky Q&A
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←Coverage Closure and Sampling Timing Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. Functional Coverage Puzzles
  4. Coverage Closure and Sampling Timing Puzzles
  5. Reset-time samples filtered by iff
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    VLSI DV Interview PuzzlesAll levels

    Reset-time samples filtered by iff

    During reset the state bus carries junk values. Compute cp_state coverage as written, and what it would be if the iff guard were missing. Options: none set (defaults); the only filter is the coverpoint iff (rst_n).

    Puzzle

    Difficulty: Medium · Puzzle 4 of 6 · Topic: Coverage Closure and Sampling Timing Puzzles

    During reset the state bus carries junk values. Compute cp_state coverage as written, and what it would be if the iff guard were missing. Options: none set (defaults); the only filter is the coverpoint iff (rst_n).

    Code

    design.sv
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    covergroup cg with function sample(bit rst_n, bit [1:0] state);
      cp_state: coverpoint state iff (rst_n) {
        bins s0 = {0};
        bins s1 = {1};
        bins s2 = {2};
        bins s3 = {3};
      }
    endgroup
    
    initial begin
      cg c = new();
      c.sample(0,3);
      c.sample(1,0);
      c.sample(1,1);
      c.sample(0,2);
      c.sample(1,1);
    end

    Hint

    A sample whose iff condition is false is ignored by that coverpoint entirely.

    Step-by-step solution

    Diagram
    1) Samples with rst_n = 0 ((0,3) and (0,2)) are dropped by the iff guard.
    2) Remaining samples are states 0, 1, 1 -> s0 and s1 hit.
    3) Coverage = 2/4 = 50%.
    4) Without the iff, 3 and 2 would also hit s3 and s2 -> 4/4 = 100%, a false closure.

    Answer

    Answer: With the guard cp_state is 50% (s0, s1); without it 100%, because junk values seen in reset would fill s2 and s3.

    How this was checked

    Checked by running a model of the rule in a Python model. A model of the iff guard: samples taken during reset are dropped, so only s0 and s1 count.

    Why candidates get it wrong

    iff is evaluated per coverpoint, so it filters only cp_state; other coverpoints in the same group would still sample during reset unless they carry their own guard. Reset-time junk is a classic source of fake 100% closure.

    Interviewer follow-up

    Besides iff on each coverpoint, how can you keep reset samples out of the whole covergroup? Model answer: Do not trigger the sample: put the condition in the covergroup event (covergroup cg @(posedge clk iff rst_n)) or call sample() from the monitor only when rst_n is high. Then every coverpoint and cross is protected without repeating the guard.

    Say it out loud

    I would check what the guard filters. With the iff on reset, coverage is 50 percent, with only s0 and s1 hit. Without it, junk values on the bus during reset fill s2 and s3, and it would show a fake 100 percent. The trap is that iff is per coverpoint, so other coverpoints in the same group still sample during reset unless they have their own guard.

    Related topics

    • Exclusions, Patterns & Filters

    • Sampling: Clocked, Event & sample()

    • Back to Coverage Closure and Sampling Timing Puzzles

    • Functional Coverage Puzzles section

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    See also

    • Sampling region off-by-one on state bins
    • Unreachable bin from stimulus constraints
    • at_least threshold causes closure plateau