Lock Detect, Loss of Lock, and Holdover: Reports and Metrics

Reports and metrics

Reports and Metrics for Lock Detect, Loss of Lock, and Holdover focuses on Time to lock (TTL) and holdover phase error during reference loss.. The purpose is to turn link observations into mechanism-backed actions with explicit owners and release-safe validation.

Reports should explain why Time to lock (TTL) and holdover phase error during reference loss. moved, not simply that it moved. Require evidence that links the movement to command behavior, queue policy, PHY margin, or reliability controls.

Before/after trend

BEFORE / AFTER - Lock Detect, Loss of Lock, and Holdover

BER     ████████        ██
margin  ███             ██████
retrain █████           █

metric: Time to lock (TTL) and holdover phase error during reference loss.

Evidence matrix

SERDES EVIDENCE MATRIX - Lock Detect, Loss of Lock, and Holdover

+-------------------------------+--------------------------------+--------------------------------+---------------------------+
| Evidence                      | Tells you                      | Does not prove                 | Next action               |
+-------------------------------+--------------------------------+--------------------------------+---------------------------+
| eye margin/miss + ACT/PRE mix    | locality and row-state cost    | lane-level capture integrity   | inspect training margins  |
| queue age + class breakdown   | fairness and starvation risk   | command legality details       | parse command timeline    |
| IEEE/OIF legality + bus timeline | timing-window pressure         | root cause by itself           | correlate with traffic map|
| eye / Vref / skew snapshots   | PHY margin and drift behavior  | controller policy quality      | pair with schedule logs   |
| CE/UE + scrub telemetry       | reliability trajectory         | immediate perf bottleneck only | map to hotspot addresses  |
+-------------------------------+--------------------------------+--------------------------------+---------------------------+

• Track p50/p95/p99 latency and effective bandwidth together.

• Include command and queue context alongside high-level counters.

• Tag reports with firmware, timing profile, and thermal state.

• Call out contradictory evidence instead of hiding it.

SerDes deep dive

CDR loop architecture, phase detectors, jitter tolerance/transfer, lock detect, and holdover behavior.

Concept diagram

CLOCK DATA RECOVERY
cdr-loop-architecture -> phase-detectors -> closure

Metric graph

MARGIN TREND
healthy ██████
failing ██

Reports and artifacts

• eye margin log

• BER/FEC counter sheet

• coefficient dump

• JTOL/compliance margin report

Mini case study

A corner board failed link training after package update; isolating lane skew and PI noise restored margin.

Debug branches

• Classify failure: training, eye, jitter, deskew, or runtime drift

• Capture coefficient and margin artifacts under fixed thermal tags

• Correlate SI/PI measurements before retuning adaptation

Senior review question

Ask: which latency, bandwidth, and reliability evidence proves this SerDes topic is closed under real traffic?

Key takeaways

• Always tie controller and PHY counter shifts to application latency and throughput outcomes.

• Lock firmware timing profile, thermal condition, and DIMM state before comparing SerDes captures.

Common pitfalls

• Chasing peak bandwidth while ignoring p99 latency and fairness tails.

• Changing timing guardbands without separating SI noise from scheduling issues.

• Declaring closure without reliability gates, fault injection, and regression replay.

Report interpretation

Lock detectors declare CDR lock when phase/frequency error stays within thresholds over a window. Loss-of-lock must trigger safe receiver states, retrain, or protocol-specific recovery. Holdover modes maintain output clock when reference disappears—critical for retimers and clock forwarding—with drift bounded by VCO quality. SERDES inefficiency is multiplicative: one extra ACTIVATE, one unnecessary turnaround, one weak lane margin, or one refresh collision repeated across billions of accesses can dominate product tail latency and power.

Use Time to lock (TTL) and holdover phase error during reference loss. as the opening signal, not the conclusion. A metric move only becomes actionable when paired with workload context, training traces, training telemetry, and evidence artifacts such as Lock/unlock timeline with holdover drift measurement..

CDR loop architecture, phase detectors, jitter tolerance/transfer, lock detect, and holdover behavior. Senior review quality comes from proving a complete chain: request pattern -> link-state transition -> bottleneck mechanism -> smallest owner fix -> regression-safe validation.

For Lock Detect, Loss of Lock, and Holdover, reports should explain why Time to lock (TTL) and holdover phase error during reference loss. moved: fewer row misses, lower turnaround waste, better refresh placement, or stronger lane margin stability.

Strong reports include consistency checks: scheduler narrative matches training logs; PHY narrative matches margin sweeps; reliability narrative matches CE/UE trajectories.