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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
    • STA Foundations
    • Setup, Hold and Slack
    • Skew and Variation
      • Skew and Jitter in Practical STA
      • Uncertainty Modeling
      • Clock Tree and Skew Sources
      • Reading Timing Reports with Skew Context
      • OCV and AOCV Concepts
    • Timing Exceptions
    • Clock Gating
    • RTL for Timing
    • Clock Architecture
  • Reset & CDC34
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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←Skew and Variation
  1. Topics
  2. RTL Design
  3. Timing & Clocking
  4. Skew and Variation
  5. Skew and Jitter in Practical STA
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    Part 5 of 9, lesson 12 of 39Part 5 of 9/Timing & Clocking/Lesson 12 of 39Intermediate

    Skew and Jitter in Practical STA

    Skew sign, useful skew between stages, and jitter as margin.

    A path that fails by 0.12 ns can pass by 0.18 ns when the capture clock arrives 0.30 ns later. The next stage pays the same 0.30 ns, so skew moves slack around and creates none.

    After this lesson you can: give the sign of skew for a launch-capture pair, say what it does to setup and hold, and show where useful skew takes its slack from.

    Skew definition

    skewA→B​=tclk​(B)−tclk​(A)

    For a path from launch flop A to capture flop B, positive skew means the clock at B arrives later. Skew belongs to the path, not to one flop.

    One flop has different skew against each of its fan-in flops.

    Skew sign

    Setup (A → B)

    Hold (A → B)

    Next stage (B → C)

    Positive (B later)

    Gains time

    Loses margin

    B launches later, so B → C loses setup time

    Negative (B earlier)

    Loses time

    Gains margin

    B → C gains setup time

    Zero

    Neutral

    Neutral

    Neutral

    Useful skew

    In the example below, 0.30 ns of skew moves a path from −0.12 ns to +0.18 ns. The next stage loses the same 0.30 ns.

    Useful skew: clock B arrives 0.30 ns after clock A. Stage 1 gains 0.30 ns of slack and stage 2 gives up the same 0.30 ns.

    Read the picture from the clock offsets down to the bars: the dashed bar is the slack before the skew and the solid bar is the slack after it.

    • Stage 1 starts failing (-0.12 ns) and ends passing (+0.18 ns).

    • Stage 2 pays for it: it falls from +0.50 ns to +0.20 ns, still positive.

    • The two slacks add up to the same 0.38 ns before and after. The skew moves slack; it does not create any.

    Stage

    Slack before

    Slack after +0.30 ns skew

    1 (hard), A to B

    -0.12 ns

    +0.18 ns

    2 (easy), B to C

    +0.50 ns

    +0.20 ns

    Total

    0.38 ns

    0.38 ns

    Jitter and margin

    Jitter is cycle-to-cycle variation of the clock edge from the PLL and supply noise. It is modeled as a margin on the capture edge.

    Skew is deterministic once the clock tree is built, and STA reads it from the netlist. Jitter is statistical and enters through set_clock_uncertainty.

    Both enter the same slack equations; only the source differs.

    Intentional skew can hide real problems. A flop whose clock is delayed by 0.3 ns on purpose may meet timing in STA but fail a CDC or reset-release analysis if those do not know about the delay. Document the intent.

    Check yourself In the example above, stage 2 loses 0.30 ns. What happens if it had only +0.20 ns slack to begin with?

    It would end at −0.10 ns. Useful skew is only free when the next stage has enough slack to give.

    • Positive skew (capture later) gains setup time and loses hold margin. Skew belongs to the path, not to one flop.

    • Useful skew is a transfer: stage 1 gains 0.30 ns, stage 2 loses 0.30 ns, and the total stays 0.38 ns.

    • Skew is fixed once the tree is built. Jitter is statistical and enters through set_clock_uncertainty.

    Rule of thumb: before you borrow slack with skew, check that the next stage has slack to give.

    • Interview: run a mock interview on this topic

    Related topics

    • Uncertainty modeling

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    See also

    • Clock Tree and Skew Sources
    • Reading Timing Reports with Skew Context
    • OCV and AOCV Concepts