LLC Inclusivity and Exclusivity Policies: Interview Drills

Interview drills

Interview Drills for LLC Inclusivity and Exclusivity Policies explains how to reason from coherency invariant to measurable engineering decision.

PROMPT
You observe regression in llc hit ratio vs invalidation amplification for LLC Inclusivity and Exclusivity Policies.

STRONG ANSWER SHAPE
1. Name the broken invariant.
2. Explain likely mechanism.
3. Ask for cache residency report + invalidation trace.
4. Propose one reversible fix.
5. Define regression guardrails.

WEAK ANSWER SHAPE
- jumps to micro-optimizations without proving mechanism

Cache coherency deep dive

Cache coherence is a correctness contract across caches, interconnect, and software ordering.

Concept diagram

requester -> coherence fabric -> owner or memory -> state update

Metric graph

traffic mix across request, snoop, response, data

Metrics and artifacts to collect

• coherence latency

• invalidation rate

• retry rate

• stale-read incidents

Mini case study

Anchor debug to first stale read and the exact line state transition.

Debug branches

• Track ownership

• Track ordering

• Track evidence

Senior review question

Ask: what is the first line state transition that deviates, and which ordering rule does it break?

Key takeaways

• Tie every coherency claim to one cache line, one transaction identity, and one measurable counter.

• Keep proof artifacts from simulation and silicon replay aligned by address, state, and ordering event.

Common pitfalls

• Chasing bandwidth regressions without checking false sharing and line bouncing first.

• Assuming coherence correctness implies memory consistency correctness.

• Declaring closure without litmus, stress, and post-silicon replay evidence.