Ordering and Consistency

Module objective

Bridging hardware protocol ordering to software memory-model promises.

• Focus on mechanism-level reasoning over memorized templates.

• Map every claim to a measurable metric and artifact.

• Practice staff-grade communication through structured review language.

Topics

1. memory-model-to-protocol-mapping/ — Memory Model to Protocol Mapping

2. barriers-fences-and-completions/ — Barriers, Fences, and Completions

3. speculation-replay-and-ordering-recovery/ — Speculation, Replay, and Ordering Recovery

Related topics

• Cache Coherency course hub

Cache coherency deep dive

Cache coherence is a correctness contract across caches, interconnect, and software ordering.

Concept diagram

requester -> coherence fabric -> owner or memory -> state update

Metric graph

traffic mix across request, snoop, response, data

Metrics and artifacts to collect

• coherence latency

• invalidation rate

• retry rate

• stale-read incidents

Mini case study

Anchor debug to first stale read and the exact line state transition.

Debug branches

• Track ownership

• Track ordering

• Track evidence

Senior review question

Ask: what is the first line state transition that deviates, and which ordering rule does it break?