Synthesis & Logic Optimization · All levels

Timing-Driven Synthesis: Worked Example

Worked Example for Timing-Driven Synthesis.

Worked example

Worked Example for Timing-Driven Synthesis focuses on critical path WNS, violating endpoint count, compile effort distribution. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

A weekly compile reports critical path WNS, violating endpoint count, compile effort distribution regression. Instead of random knob tuning, start by proving whether input context changed and which mechanism dominates.

Sequence under inspection

diagram
SYNTHESIS FLOW — Timing-Driven Synthesis

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: critical path WNS, violating endpoint count, compile effort distribution

Timing-driven effort allocation

diagram
path groups ranked by slack
      |
      v
high effort on critical groups
medium effort on near-critical
low effort elsewhere
  1. Capture baseline and regressed artifact pair.

  2. Confirm manifest parity (RTL, SDC, libs, switches).

  3. Pin first metric drift and mechanism hypothesis.

  4. Reproduce with critical range report, path-group WNS report, effort histogram.

  5. Apply one reversible fix and run matrix regression.

Did the fix hold?

diagram
BEFORE / AFTER QOR — Timing-Driven Synthesis

QoR score
  0 |                     --- target zone
 -1 |        ● regression
 -2 |             ● baseline
 -0.5|                  ● after fix
    +----------------------------------> iteration

Validate timing + area + power, not one number.

Synthesis deep dive

Mapping converts logic intent into real PPA outcomes.

Concept diagram

diagram
MAPPING LOOP

boolean net -> library mapping -> optimization -> report and iterate

Metric graph

diagram
MAPPING IMPACT

depth reduction   ███████
fanout cleanup    █████
runtime overhead  ███

Reports and artifacts

  • mapping summary

  • critical path cell list

  • fanout/slew report

  • library coverage

Mini case study

Cell-heavy critical path improved after restructuring, while blanket buffering had worsened power.

Debug branches

  • Depth issue -> structure

  • Fanout issue -> buffers

  • Library mismatch -> view audit

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

  • State exact run context (RTL, SDC, libs, switches) with every QoR claim.

  • Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

  • Comparing runs with mismatched constraints or library views.

  • Timing-only fixes that violate power or area budgets.

  • Skipping equivalence checks after structural changes.

Principal synthesis review addendum

Timing-driven compile focuses optimization where slack is most constrained, balancing global QoR instead of over-optimizing non-critical logic.

Metric: critical path WNS, violating endpoint count, compile effort distribution