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Constraint Bug Patterns

STA Debug Playbook: Most 'mystery' STA failures are wrong clocks, missing generated clocks, bad I/O delay, or over-broad exceptions.

What this topic teaches

Constraint Bug Patterns is about converting constraints and path rules into measurable slack. Most 'mystery' STA failures are wrong clocks, missing generated clocks, bad I/O delay, or over-broad exceptions. The hard part is never the textbook inequality; it is proving, under the right corner/mode/view, which layer — constraint, view, or implementation — broke the contract.

The senior-engineer question

When false violation count after SDC fix, constraint audit pass rate moves, can you identify the failing path group, the STA layer, the responsible owner, and the smallest experiment that proves the root cause?

diagram

STA CLOSURE FLOW — Constraint Bug Patterns

constraints (SDC)
        |
        v
timing graph (cell + net delays)
        |
        v
MMMC scenarios (corner x mode x view)
        |
        v
variation + SI adjustments
        |
        v
slack (WNS/TNS) -> ECO -> regression

Debug rule: always state corner, mode, view, and database tag with slack.

Picture the timing closure flow

Start every study session by drawing the behavior before reading signals. The diagrams below are the mental models to reproduce on a whiteboard.

Top constraint bugs

diagram

CONSTRAINT BUG TOP 5
1. missing generated_clock
2. wrong clock on latch/path
3. IO delay wrong direction
4. false_path too broad
5. case_analysis stale

Timing path sequence

diagram

TIMING PATH — Constraint Bug Patterns

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: false violation count after SDC fix, constraint audit pass rate

Who owns which layer

diagram

STA OWNERSHIP LAYERS — Constraint Bug Patterns

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

Evidence to collect

Primary metric: false violation count after SDC fix, constraint audit pass rate.
Primary artifact: SDC diff, constraint validator log, before/after path report.
Owners to bring into review: STA owner, RTL owner, synthesis owner.
Spec clause or requirement ID for every constraint claim.
One failing report_timing excerpt and one reduced path that isolates the rule.

Ownership map

diagram

OWNERSHIP MAP — Constraint Bug Patterns

artifact              owner
----------------      -----------------
timing report       STA owner
SDC/constraint      RTL owner
implementation      synthesis owner

Every WNS cluster needs a named owner before ECO.

Subpages in this topic

Each topic is taught across mechanism, inputs/outputs, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

State corner, mode, and view with every slack number.
Separate constraint bugs, view mismatches, and real path delays before ECO.
Run setup and hold plus full MMMC after every change.

Common pitfalls

Comparing runs with different SPEF or SDC tags.
Broad false_path to hide violations.
Setup-only ECO without hold regression.

STA deep dive

Debug hygiene separates senior STA leads from report readers.

Concept diagram

diagram

DEBUG ORDER

1. same tags?  2. constraints?  3. view?  4. real path?  5. ECO

Metric graph

diagram

ROOT CAUSE MIX (typical)

constraint bugs  ████████  35%
view mismatch    ██████    25%
real path        ██████    25%
methodology      ████      15%

Reports and artifacts

run manifest
SDC diff
SPEF tag
scenario isolation

Mini case study

Mystery regression: SPEF corner tag typo in run script — not a design bug.

Debug branches

Manifest every run
War room by path group

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

State corner, mode, view, and database tag with every slack claim.
Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

Comparing STA runs with different SPEF or SDC tags.
Broad false_path to green-wash violations.
Setup-only ECO without hold check.

Practice this lesson