Noise Glitch Analysis: Worked Example

Worked example

Worked Example for Noise Glitch Analysis focuses on noise peak, glitch width, functional fail rate on SI-critical nets. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

A signoff run shows noise peak, glitch width, functional fail rate on SI-critical nets. The first review mistake is to blame implementation without checking constraints. A better review starts by pinning one critical path, proving where slack was lost, and checking whether the SDC rule is correct for Noise Glitch Analysis.

Sequence under inspection

TIMING PATH — Noise Glitch Analysis

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: noise peak, glitch width, functional fail rate on SI-critical nets

Glitch on quiet victim

VOLTAGE
  ^     glitch peak
  |    /\
  |___/  \_____ victim (should stay quiet)
      ^ may cause false toggle on input FF

1. Capture report_timing and the relevant SDC excerpt.

2. Tag corner, mode, view, and path group.

3. Find the first cell or net that dominates critical delay.

4. Compare against noise report, victim waveform, fix list (spacing/shielding).

5. Choose one reversible ECO and write the regression matrix before editing netlist or constraints.

Did the fix work?

BEFORE / AFTER ECO — Noise Glitch Analysis

WNS (ps)
  0 |                    --- target
-50 |    ● regressed
-80 |         ● before ECO
-20 |              ● after ECO
    +-------------------------------> ECO iteration
Prove setup AND hold moved safely.

STA deep dive

Coupling makes delay a function of neighbors, not just wire RC.

Concept diagram

SI ON VICTIM

victim net delay = base_RC + coupling_from_aggressors

Metric graph

DELTA DELAY ON CRITICAL PATHS

no SI   ████████  1.2ns
with SI ██████████  1.35ns  (+150ps)

Reports and artifacts

• delta delay report

• aggressor list

• noise peaks

• SI WNS delta

Mini case study

Setup fixed by upsize but SI worsened — spacing ECO on bus bits recovered margin.

Debug branches

• Re-run SI after every timing ECO

• Shield wide switching buses

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Principal STA review addendum

Beyond delta delay, aggressors can inject glitches on quiet victims; noise analysis checks functional thresholds on sensitive inputs.

Metric: noise peak, glitch width, functional fail rate on SI-critical nets